Embedded Low-Power Processor for Personalized Stress Detection

被引:30
|
作者
Attaran, Nasrin [1 ]
Puranik, Abhilash [1 ]
Brooks, Justin [2 ]
Mohsenin, Tinoosh [1 ]
机构
[1] Univ Maryland Baltimore Cty, Dept Comp Sci & Elect Engn, Baltimore, MD 21250 USA
[2] US Army Res Lab, Human Res & Engn Directorate, Adelphi, MD 20783 USA
基金
美国国家科学基金会;
关键词
ASIC; FPGA; K-nearest neighbor (KNN); personalized stress detection; support vector machine (SVM);
D O I
10.1109/TCSII.2018.2799821
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Personal monitoring systems require sampling and processing on multiple streams of physiological signals to extract meaningful information. These systems require a large number of digital signal processing and machine learning kernels, which typically require significant amounts of power. However, to be used in a wearable environment, the processing system needs to be low-power, real-time, and light-weight. In this brief, we present a personalized stress monitoring processor that can meet these requirements. First, various physiological features are explored to maximize stress detection accuracy using two machine learning classifiers including support vector machine (SVM) and K-nearest neighbors (KNN). Among different extracted features from four physiological sensors, heart rate and accelerometer features have 96.7% (SVM) and 95.8% (KNN) detection accuracy. In the second part, two fully flexible and multi-modal processing hardware designs are presented that consist of feature extraction and classification algorithms. We first demonstrate the ASIC post-layout implementation of both designs in 65-nm CMOS technology as well as the implementation on Artix-7 field-programmable gate array (FPGA). The proposed SVM and KNN processors on the ASIC platform occupy an area of 0.17 mm(2) and 0.3 mm(2) and dissipate 39.4 mW and 76.69 mW power, respectively. The ASIC implementation improves the energy efficiency by 42x (SVM) and 12x (KNN) over FPGA implementations. The entire stress monitoring system is further evaluated against a number of other platforms including Raspberry Pi 3B, NVIDIA TX1 GPU, and NVIDIA TX2 GPU. The experimental results indicate that ASIC and FPGA platforms have the highest throughput (decision/sec) as well as lowest power consumption over all other platforms. The ASIC/FPGA implementations improve the energy efficiency (throughput/power) by 6/5 and 5/4 order of magnitude compared to TX1 GPU and Raspberry pie ARM platforms, respectively.
引用
收藏
页码:2032 / 2036
页数:5
相关论文
共 50 条
  • [1] Simulation in low-power embedded processor design
    Yoshida, Y
    Onoye, T
    Shirakawa, I
    Kubo, N
    [J]. SIMULATION IN INDUSTRY: 9TH EUROPEAN SIMULATION SYMPOSIUM 1997, 1997, : 557 - 561
  • [2] Low-power consumption architecture for embedded processor
    Yoshida, Y
    Song, BY
    Okuhata, H
    Onoye, T
    Shirakawa, I
    [J]. 1996 2ND INTERNATIONAL CONFERENCE ON ASIC, PROCEEDINGS, 1996, : 77 - 80
  • [3] Towards Low-Power Embedded Vector Processor
    Stanic, Milan
    Palomar, Oscar
    Hayes, Timothy
    Ratkovic, Ivan
    Unsal, Osman
    Cristal, Adrian
    [J]. PROCEEDINGS OF THE ACM INTERNATIONAL CONFERENCE ON COMPUTING FRONTIERS (CF'16), 2016, : 339 - 342
  • [4] A Low-Power Multi-Physiological Monitoring Processor for Stress Detection
    Attaran, Nasrin
    Brooks, Justin
    Mohsenin, Tinoosh
    [J]. 2016 IEEE SENSORS, 2016,
  • [5] Low-Power Implantable Seizure Detection Processor
    Omar, Sherif
    Mostafa, Hassan
    Ismail, Tawfik
    Gabran, Salam
    [J]. 2015 IEEE CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (ICECS), 2015, : 496 - 497
  • [6] Implementation of a low-power embedded processor for iot applications and wearables
    Mansour, Kareem
    Saeed, Ahmed
    [J]. International Journal of Circuits, Systems and Signal Processing, 2019, 13 : 625 - 636
  • [7] Low-Power Embedded Processor Design Using Branch Direction
    Park, Gi-Ho
    Park, Jung-Wook
    Jung, Gunok
    Kim, Shin-Dug
    [J]. IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2009, E92A (12) : 3180 - 3181
  • [8] Method to Design Low-power Embedded Processor for Wireless Endoscope
    Xu Xinfeng
    Hei Yong
    [J]. 2009 3RD INTERNATIONAL CONFERENCE ON BIOINFORMATICS AND BIOMEDICAL ENGINEERING, VOLS 1-11, 2009, : 1284 - 1287
  • [9] Implementation of Lightweight eHealth Applications on a Low-Power Embedded Processor
    Yang, Mingyu
    Hara-Azumi, Yuko
    [J]. IEEE ACCESS, 2020, 8 (08): : 121724 - 121732
  • [10] Implementation of Embedded RISC Processor with Dynamic Power Management for Low-Power Embedded system on SOC
    Kumar, Narender
    Rattan, Munish
    [J]. 2015 2ND INTERNATIONAL CONFERENCE ON RECENT ADVANCES IN ENGINEERING & COMPUTATIONAL SCIENCES (RAECS), 2015,