A 77-GHz Mixed-Mode FMCW Signal Generator Based on Bang-Bang Phase Detector

被引:0
|
作者
Lin, Jianfu [1 ]
Song, Zheng [1 ]
Qi, Nan [2 ]
Rhee, Woogeun [1 ]
Chi, Baoyong [1 ]
机构
[1] Tsinghua Univ, Inst Microelect, Beijing, Peoples R China
[2] Chinese Acad Sci, Inst Semicond, Beijing, Peoples R China
关键词
PLL;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 77-GHz mixed-mode frequency-modulated continuous-wave (FMCW) signal generator is proposed based on the bang-bang phase detector (BBPD). Instead of employing a linear digital-to-time converter (DTC), a 1-bit 3rd-order single-loop Delta Sigma modulator (SLDSM3) and a hybrid finite-impulse response (FIR) filter are utilized to suppress the quantization noise induced by the BBPD. Two-stage infinite-impulse response (IIR) filters are inserted into the digital loop filter (DLF) to reduce the instant variation at output, smoothing the chirp waveform during its generation. To improve the linearity around the turning-around points (TAPs) of the chirp, a type-III slope estimator with switchable polarity is employed. The prototype is implemented in 65-nm CMOS technology, with the total power consumption of 43.1 mW. Measurement results show a 77-GHz carrier with -81.7-dBc/Hz phase noise at 1-MHz offset, as well as a generated triangle chirp that features 1-ms repetition period, 1.827-GHz bandwidth and 336-kHz root-mean-square (RMS) frequency error.
引用
收藏
页码:317 / 320
页数:4
相关论文
共 22 条
  • [1] A 77-GHz Mixed-Mode FMCW Signal Generator Based on Bang-Bang Phase Detector
    Lin, Jianfu
    Song, Zheng
    Qi, Nan
    Rhee, Woogeun
    Wang, Zhihua
    Chi, Baoyong
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018, 53 (10) : 2850 - 2863
  • [2] A 77-GHz Mixed-Mode FMCW Generator Based on a Vernier TDC With Dual Rising-Edge Fractional-Phase Detector
    Wu, Jianxi
    Deng, Wei
    Chen, Zipeng
    Zheng, Wei
    Liu, Yibo
    Wang, Shufu
    Qi, Nan
    Chi, Baoyong
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2020, 67 (01) : 60 - 73
  • [3] A 77-GHz Mixed-Mode FMCW Generator Based on a Vernier TDC with Dual Rising-Edge Fractional-Phase Detector
    Wu, Jianxi
    Chen, Zipeng
    Zheng, Wei
    Liu, Yibo
    Wang, Shufu
    Qi, Nan
    Chi, Baoyong
    [J]. 2018 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC): PROCEEDINGS OF TECHNICAL PAPERS, 2018, : 79 - 82
  • [4] A 622-Mb/s Mixed-Mode BPSK Demodulator Using a Half-Rate Bang-Bang Phase Detector
    Kim, Duho
    Choi, Kwang-chun
    Seo, Young-kwang
    Kim, Hyunchin
    Choi, Woo-Young
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2008, 43 (10) : 2284 - 2292
  • [5] Jitter analysis of a PLL-based CDR with a bang-bang phase detector
    Ramezani, M
    Andre, C
    Salama, T
    [J]. 2002 45TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL III, CONFERENCE PROCEEDINGS, 2002, : 393 - 396
  • [6] A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping
    Dartizio, Simone M.
    Tesolin, Francesco
    Mercandelli, Mario
    Santiccioli, Alessio
    Shehata, Abanob
    Karman, Saleh
    Bertulessi, Luca
    Buccoleri, Francesco
    Avallone, Luca
    Parisi, Angelo
    Lacaita, Andrea L.
    Kennedy, Michael P.
    Samori, Carlo
    Levantino, Salvatore
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2022, 57 (06) : 1723 - 1735
  • [7] Markov chains-based derivation of the phase detector gain in bang-bang PLLs
    Da Dalt, Nicola
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2006, 53 (11) : 1195 - 1199
  • [8] A Self-Calibrated Bang-Bang Phase Detector for Low-Offset Time Signal Processing
    Prinzie, Jeffrey
    Steyaert, Michiel
    Leroux, Paul
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2016, 63 (05) : 453 - 457
  • [9] A 47GHz Mixed-Mode FMCW Signal Generator for Fast Triangular Chirp Modulation
    Chen, Guopei
    Ma, Ruichang
    Cao, Mengdi
    Duan, Luqiang
    Chen, Zhiyuan
    Deng, Wei
    Chi, Baoyong
    [J]. 2019 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2019,
  • [10] Analysis of phase noise due to bang-bang phase detector in PLL-based clock and data recovery circuits
    Vichienchom, K
    Liu, WT
    [J]. PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I: ANALOG CIRCUITS AND SIGNAL PROCESSING, 2003, : 617 - 620