Versatile analogue motion estimator architecture

被引:0
|
作者
Panovic, M [1 ]
Demosthenous, A [1 ]
机构
[1] UCL, Dept Elect & Elect Engn, London WC1E 7JE, England
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
A motion estimator architecture based on analogue subsystems is presented which meets the requirements of several different video coding standards. The proposed architecture allows motion estimation parameters to be changed to meet various video standards without redesigning the hardware. Moreover, it offers reductions in size, power dissipation and consequently cost, over digital implementations, while maintaining the versatility of the digital approach. Simulated results indicate that the architecture is not sensitive to errors usually associated with the use of analogue circuits.
引用
收藏
页码:986 / 990
页数:5
相关论文
共 50 条
  • [1] Versatile architecture for block matching motion estimation
    Han, TH
    Hwang, SH
    [J]. IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 1999, 146 (04): : 188 - 195
  • [2] Architecture of a fast motion estimator for MPEG video coding
    Ling, N
    Advani, R
    [J]. SECOND INTERNATIONAL SYMPOSIUM ON PARALLEL ARCHITECTURES, ALGORITHMS, AND NETWORKS (I-SPAN '96), PROCEEDINGS, 1996, : 473 - 479
  • [3] Highly scalable parallel parametrizable architecture of the motion estimator
    Cmar, R
    Vernalde, S
    [J]. EUROPEAN DESIGN & TEST CONFERENCE - ED&TC 97, PROCEEDINGS, 1997, : 208 - 212
  • [4] Flexible VLSI architecture of motion estimator for video image compression
    Nam, SH
    Lee, MK
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1996, 43 (06): : 467 - 470
  • [5] A versatile and scalable MIMD architecture for studio quality motion estimation
    Mombers, F
    Dogimont, S
    Mlynek, D
    Garino, P
    [J]. ELEVENTH ANNUAL IEEE INTERNATIONAL ASIC CONFERENCE - PROCEEDINGS, 1998, : 315 - 318
  • [6] Versatile crop yield estimator
    Sadeh, Yuval
    Zhu, Xuan
    Dunkerley, David
    Walker, Jeffrey P.
    Chen, Yang
    Chenu, Karine
    [J]. AGRONOMY FOR SUSTAINABLE DEVELOPMENT, 2024, 44 (04)
  • [7] Architecture and VLSI implementation of a programmable HD real-time motion estimator
    Gaedke, K.
    Borsurri, M.
    Georgi, M.
    Kluger, A.
    Le Glanic, J. -P.
    Bernard, P.
    [J]. 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, 2007, : 1609 - +
  • [8] A novel versatile architecture for autonomous underwater vehicle's motion planning and task assignment
    Zadeh, Somaiyeh Mahmoud
    Powers, David M. W.
    Sammut, Karl
    Yazdani, Amir Mehdi
    [J]. SOFT COMPUTING, 2018, 22 (05) : 1687 - 1710
  • [9] A novel versatile architecture for autonomous underwater vehicle’s motion planning and task assignment
    Somaiyeh Mahmoud Zadeh
    David M. W. Powers
    Karl Sammut
    Amir Mehdi Yazdani
    [J]. Soft Computing, 2018, 22 : 1687 - 1710
  • [10] A VLSI architecture for MPEG2 MP@HL real time motion estimator
    Onoye, T
    Fujita, G
    Shirakawa, I
    Matsumura, K
    Ariyoshi, H
    Tsukiyama, S
    [J]. ISCAS 96: 1996 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - CIRCUITS AND SYSTEMS CONNECTING THE WORLD, VOL 2, 1996, : 664 - 667