Electrical Characterization of Millimeter-Wave Interconnects on Low-k and Low-loss Oxides for Advanced 3D Silicon Interposers

被引：0

作者：

Reig, B. ^{[1
]}

Renaux, P. ^{[1
]}

Sibuet, H. ^{[1
]}

Mercier, D. ^{[1
]}

Mounet, C. ^{[1
]}

Ferrandon, C. ^{[1
]}

Joblot, S. ^{[2
]}

Bar, P. ^{[2
]}

Coudrain, P. ^{[2
]}

Carpentier, J. F. ^{[2
]}

Lacrevaz, T. ^{[3
]}

Flechee, B. ^{[3
]}

机构：

[1] CEA, LETI, MINATEC Campus, F-38054 Grenoble, France

[2] STMicroelectronics, F-38926 Crolles, France

[3] Univ Savoie, IMEP LAHC, UMR CNRS 5130, F-73376 Le Bourget Du Lac, France

来源：

2011 41ST EUROPEAN MICROWAVE CONFERENCE | 2011年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents electrical characterization of millimeter wave interconnects on oxides to realize routing layers and through-Silicon-Vias interconnections in 3D silicon interposers. As a compromise has to be found between good RF performances and temperature compliant with 3D integration technology, a wide variety of oxide insulators are tested using coplanar waveguide transmission lines. Effects increasing microwave losses are discussed, mainly losses due to the presence of charge carriers at the silicon/oxide interface but also due to light radiation and environment.

引用

页码：1169 / 1172

页数：4

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