Gate direct-tunnelling and hot-carrier-induced hysteresis effect in partially depleted silicon-on-insulator floating-body MOSFETs

The hysteresis effect in the output characteristics of partially depleted (PD) silicon-on-insulator (SOI) floating-body MOSFETs with an ultra-thin gate oxide is studied taking account of both gate direct-tunnelling and impact ionization-induced hot-carrier mechanisms. It is proposed that hole tunnelling from valence band (HVB) for floating-body PD SOI n-MOSFETs, electron tunnelling from conduction band (ECB) for floating-body PD SOI p-MOSFETs and impact-ionization-induced hot carriers are the main causes of the hysteresis effect. Meanwhile, body-contact structures of T-gate and H-gate PD SOI MOSFETs are also studied under floating-body configurations. It is found that the influence of the converse poly-gate on the body-contact side on gate direct-tunnelling cannot be neglected in view of floating-body potential variation. Based on the measurement results, the hysteresis can be suppressed using T-gate and H-gate PD SOI MOSFETs with floating-body configurations.