Logical reliability of interacting real-time tasks

被引:0
|
作者
Chatterjee, Krishnendu [1 ]
Ghosal, Arkadeb [1 ]
Henzinger, Thomas A. [2 ]
Iercan, Daniel [3 ]
Kirsch, Christoph M. [4 ]
Pinello, Claudio [5 ]
Sangiovanni-Vincentelli, Alberto [1 ]
机构
[1] Univ Calif Berkeley, Berkeley, CA 94720 USA
[2] Ecole Polytech Fed Lausanne, Lausanne, Switzerland
[3] Politechn Uni Timisoara, Timisoara, Romania
[4] Salzburg Univ, A-5020 Salzburg, Austria
[5] Cadense Res Lab, Berkeley, CA 94704 USA
基金
奥地利科学基金会;
关键词
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
We propose the notion of logical reliability for real-time program tasks that interact through periodically updated program variables. We describe a reliability analysis that checks if the given short-term (e.g., single-period) reliability of a program variable update in an implementation is sufficient to meet the logical reliability requirement (of the program variable) in the long run. We then present a notion of design by refinement where a task can be refined by another task that writes to program variables with less logical reliability. The resulting analysis can be combined with an incremental schedulability analysis for interacting real-time tasks proposed earlier for the Hierarchical Timing Language (HTL), a coordination language for distributed real-time systems. We implemented a logical-reliability-enhanced prototype of the compiler and runtime infrastructure for HTL.
引用
收藏
页码:788 / +
页数:2
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