共 50 条
- [1] SIGNAL & POWER INTEGRITY CO-SIMULATION ON DDR MEMORY PROCEEDINGS OF THE ASME PACIFIC RIM TECHNICAL CONFERENCE AND EXHIBITION ON PACKAGING AND INTEGRATION OF ELECTRONIC AND PHOTONIC SYSTEMS, MEMS AND NEMS 2011, VOL 1, 2012, : 641 - +
- [2] Power integrity/signal integrity co-simulation for fast design closure PROCEEDINGS OF THE 7TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, VOLS. 1 AND 2, 2005, : 49 - 53
- [3] Dynamic Power and Signal Integrity Analysis for Chip-Package-Board Co-Design and Co-Simulation EUWIT: 2009 EUROPEAN WIRELESS TECHNOLOGY CONFERENCE, 2009, : 246 - +
- [4] Dynamic Power and Signal Integrity Analysis for Chip-Package-Board Co-Design and Co-Simulation 2009 EUROPEAN MICROWAVE INTEGRATED CIRCUITS CONFERENCE (EUMIC 2009), 2009, : 527 - +
- [5] Signal and Power Integrity Co-Simulation of HBM Interposer in High Density 2.5D Package 2022 23RD INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, ICEPT, 2022,
- [6] Framework for Co-Simulation of Signal and Power Integrity in Server Systems 2012 IEEE 21ST CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS, 2012, : 21 - 24
- [7] Practical Aspects of Modeling Apertures for Signal and Power Integrity Co-simulation 2011 IEEE 20TH CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS (EPEPS), 2011, : 7 - 10
- [8] Chip-Package-PCB Co-Simulation for Power Integrity Design at the Early Design Stage 2015 IEEE 4TH ASIA-PACIFIC CONFERENCE ON ANTENNAS AND PROPAGATION (APCAP), 2015, : 451 - 452
- [9] Simulation-Measurement Correlation Study of Single Ended Interfaces by using Signal Integrity and Power Integrity co-Simulation PROCEEDINGS OF THE 2010 34TH IEEE/CPMT INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY CONFERENCE (IEMT 2010), 2011,
- [10] Impact of On-Chip Multi-Layered Inductor on Signal and Power Integrity of Underlying Power-Ground Net 2018 IEEE 22ND WORKSHOP ON SIGNAL AND POWER INTEGRITY (SPI), 2018,