A real time video smoothing implementation inside an FPGA-based system

In this paper, an architecture dedicated to real-time video smoothing using the RC1000P-P Virtex prototyping board is presented. In comparison with smoothing video techniques like deblocking filters in H.264 or smoothing in JPEG2000, the proposed method is implemented in hardware and its computational cost and complexity are reduced where all pixel processing related to uncompressed video is done on the fly. Out, proposed architecture tries to optimize the design of a modified version of the Nagao filere, nammed Nagamod, in order to make video smoothing with respect to real-time constraints. In this context, this paper will also examine an FPGA implementation of the proposed Nagamod algorithm, as will be seen, achieves an improvement in the video qualify and delivers 30 images per second at a 10 MHz clock cycle.