共 50 条
- [41] Efficient computation of logic circuits reliability based on Probabilistic Transfer Matrix 2008 INTERNATIONAL CONFERENCE ON DESIGN & TECHNOLOGY OF INTEGRATED SYSTEMS IN NANOSCALE, 2008, : 11 - +
- [43] AES encryption implementation and analysis on commodity graphics processing units CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2007, PROCEEDINGS, 2007, 4727 : 209 - +
- [44] CALCULATION OF RELIABILITY OF LOGIC CIRCUITS TELECOMMUNICATIONS AND RADIO ENGINEER-USSR, 1971, (01): : 140 - &
- [45] An Efficient Block Cipher Implementation on Many-Core Graphics Processing Units JOURNAL OF INFORMATION PROCESSING SYSTEMS, 2012, 8 (01): : 159 - 174
- [46] Efficient Numerical Simulation of Neuron Models with Spatial Structure on Graphics Processing Units NEURAL INFORMATION PROCESSING, ICONIP 2016, PT IV, 2016, 9950 : 279 - 285
- [47] Implementation of Efficient Operations over GF(232) Using Graphics Processing Units INFORMATION AND COMMUNICATION TECHNOLOGY, 2014, 8407 : 602 - 611
- [48] Genetic programming on graphics processing units Genetic Programming and Evolvable Machines, 2009, 10 : 447 - 471
- [49] Graphics Processing Units for Constraint Satisfaction ICAART: PROCEEDINGS OF THE 9TH INTERNATIONAL CONFERENCE ON AGENTS AND ARTIFICIAL INTELLIGENCE, VOL 2, 2017, : 653 - 657
- [50] Cell Placement on Graphics Processing Units SBCCI2007: 20TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, 2007, : 87 - 92