MPRA implementation of a 1-D decimation filter

被引：0
|
作者：
Kulkarni, N
Lenders, PM
机构：
来源：
1996 IEEE TENCON - DIGITAL SIGNAL PROCESSING APPLICATIONS PROCEEDINGS, VOLS 1 AND 2 | 1996年
关键词：
D O I：
暂无
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
The main objective of this work is to explore possible implementations of a given algorithm on a MPRA (Multi-phase Multi-rate array). We have used 1-D decimation filter as an example. The method used is to transform (with unimodular matrices) the recurrence equations describing the MPRA. The main relevant parameter of interest is the delay to produce one datum. An attempt has also been made to discover the optimum implementation(i.e. the implementation with smallest delay to produce a datum with respect to our criteria) as well as implementations with delays equal to multiples of the optimum delay. These latter implementations may be of interest when cascading decimation filters.
引用
收藏
页码：237 / 240
页数：4
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