TESTLINE: An IEEE P1500 compatible test scheme for SoC test

被引：0
|
作者：
He, H [1 ]
Sun, YH [1 ]
机构：
[1] Tsinghua Univ, Inst Microelect, Beijing 100084, Peoples R China
来源：
2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS | 2003年
关键词：
D O I：
10.1109/ICASIC.2003.1277553
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
An IEEE P1500 compatible test scheme. TESTLINE, for modular SoC testing is presented in this paper. The test scheme consists of wrappers, TAM and User Defined Controller (UDC). For a given SoC, with specified parameters of modules and their tests, TESTLINE can optimize the testing time for the whole SoC using Integer Linear Programming (ILP). The ILP can efficiently determine the width of TAM and the assignment of modules to TAM. Experimental results for the 'ITC '02 SOC Test Benchmarks' show that TESTLINE is an effective and efficient test scheme for SoC testing.
引用
收藏
页码：323 / 326
页数：4
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