共 50 条
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- [4] On-chip power noise reduction techniques in high performance SoC-based integrated circuits IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS, 2005, : 309 - 312
- [5] Circuits and techniques for high-resolution measurement of on-chip power supply noise 2004 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2004, : 102 - 105
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- [8] Analysis and reduction of on-chip inductance effects in power supply grids ISQED 2004: 5TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, PROCEEDINGS, 2004, : 131 - 136