The impact of in-situ rapid thermal gate dielectric processes on deep submicron MOSFETs

High performance MOSFETs having effective channel lengths of 0.18+/-0.06 mu m were individually optimized and fabricated with four different gate dielectrics, including Furnace,rapid thermal oxides (RTO), rapid thermal chemical vapor deposited (RTCVD) and remote plasma enhanced chemical vapor deposited (RPECVD). The advantages of the shallower channel profiles offered by the low-thermal budget gate dielectric processes were identified through the design of channel doping profiles for the different gate dielectrics. Excellent device electrical characteristics were achieved for all four cases: I(sat)similar to 410 mu A mu m(-1); I-off <10 pA mu m(-1); Delta V-t, due to short channel and DIBL effects, similar to 100 mV; and maximum I-sub <0.1 mu A mu m(-1). The measurements of device channel mobility indicated that the deposited gate oxides (RTCVD and RPECVD) gave a rougher Si/SiO2 interface than the grown ones. The characterization of device reliability by channel hot-carrier stress showed that RTO and RTCVD oxides gave about the same hot-carrier resistance as Furnace oxides, while RPECVD oxides, not having a thermally-grown interface, were appreciably lower. (C) 1997 Elsevier Science Ltd.