A direct comparison of Josephson Array Voltage Standards

被引：0

作者：

Liu, L. X. ^{[1
]}

Chua, S. W. ^{[1
]}

Lee, J. ^{[1
]}

Zhou, Y. ^{[1
]}

Hamilton, C. A. ^{[2
]}

机构：

[1] ASTAR, Natl Metrol Ctr, 1 Sci Pk Dr, Singapore 118221, Singapore

[2] VMetrix LLC, Boulder, CO USA

来源：

2008 CONFERENCE ON PRECISION ELECTROMAGNETIC MEASUREMENTS DIGEST | 2008年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A number of direct comparisons of Josephson Array Voltage Standards (JAVS) using Superconductor-Insulator-Superconductor (SIS) junction arrays have been performed at the National Metrology Centre (NMC), Singapore. The comparisons were performed over a range of voltage from 1 V to 10 V and with different combinations of array chips, both USA and German made. The comparisons used a parallel biasing method that made it relatively easy to quickly bias both arrays on a nearly matched quantum step. The Type-A uncertainty of the difference voltage was typically lower than 1.5 nV.

引用

页码：368 / +

页数：2

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