Enabling a real-time solution for neuron detection with reconfigurable hardware

被引:1
|
作者
Cordes, B [1 ]
Dy, J [1 ]
Leeser, M [1 ]
Goebel, J [1 ]
机构
[1] Northeastern Univ, Boston, MA 02115 USA
关键词
D O I
10.1109/RSP.2005.24
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
yFPGAs provide a speed advantage in processing for embedded systems, especially when processing is moved close to the sensors. Perhaps the ultimate embedded system is a neural prosthetic, where probes are inserted into the brain and recorded electrical activity is analyzed to determine which neurons have fired. In turn, this information can be used to manipulate an external device such as a robot arm or a computer mouse. To make the detection of these signals possible, some baseline data must be processed to correlate impulses to particular neurons. One method for processing this data uses a statistical clustering algorithm called Expectation Maximization, or EM. In this paper, we examine the EM clustering algorithm, determine the most computationally intensive portion, map it onto a reconfigurable device, and show several areas of performance gain.
引用
收藏
页码:128 / 134
页数:7
相关论文
共 50 条
  • [11] A hardware solution for real-time intelligent fingerprint acquisition
    Arjona, Rosario
    Baturone, Iluminada
    JOURNAL OF REAL-TIME IMAGE PROCESSING, 2014, 9 (01) : 95 - 109
  • [12] FORTH HARDWARE COMBINATION PROVIDES REAL-TIME SOLUTION
    MALINOWSKI, CW
    COMPUTER DESIGN, 1989, 28 (03): : 94 - 94
  • [13] Digital Spiking Neuron Cells for Real-Time Reconfigurable Learning Networks
    Lin, Haipeng
    Zjajo, Amir
    van Leuken, Rene
    2017 30TH IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC), 2017, : 163 - 168
  • [14] A hardware solution for real-time intelligent fingerprint acquisition
    Rosario Arjona
    Iluminada Baturone
    Journal of Real-Time Image Processing, 2014, 9 : 95 - 109
  • [15] High performance reconfigurable hardware system for real-time image processing
    赵广州
    张天序
    王岳环
    曹治国
    左峥嵘
    JournalofSystemsEngineeringandElectronics, 2005, (03) : 502 - 509
  • [16] A catalog of hardware acceleration techniques for real-time reconfigurable system on chip
    Bergmann, N
    Waldeck, P
    Williams, J
    3RD IEEE INTERNATIONAL WORKSHOP ON SYSTEM-ON-CHIP FOR REAL-TIME APPLICATIONS, PROCEEDINGS, 2003, : 112 - 115
  • [17] Parallel Real-time Garbage Collection of Multiple Heaps in Reconfigurable Hardware
    Bacon, David F.
    Cheng, Perry
    Shukla, Sunil
    ACM SIGPLAN NOTICES, 2014, 49 (11) : 117 - 127
  • [18] Hybrid hardware-software architecture for reconfigurable real-time systems
    Pellizzoni, Rodolfo
    Caccamo, Marco
    PROCEEDINGS OF THE 14TH IEEE REAL-TIME AND EMBEDDED TECHNOLOGY AND APPLICATIONS SYMPOSIUM, 2008, : 273 - 284
  • [19] Reducing the overhead of real-time operating system through reconfigurable hardware
    Song, Moonvin
    Hong, Sang Hoon
    Chung, Yunmo
    DSD 2007: 10TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN ARCHITECTURES, METHODS AND TOOLS, PROCEEDINGS, 2007, : 311 - 314
  • [20] Robotic Mapping and Localization with Real-Time Dense Stereo on Reconfigurable Hardware
    Kalomiros, John
    Lygouras, John
    INTERNATIONAL JOURNAL OF RECONFIGURABLE COMPUTING, 2010, 2010