Fair and Comprehensive Benchmarking of Machine Learning Processing Chips

被引：13
|
作者：
Burr, Geoffrey W. [1 ]
Lim, SukHwan [2 ]
Murmann, Boris [3 ]
Venkatesan, Rangharajan [4 ]
Verhelst, Marian [5 ,6 ]
机构：
[1] IBM Res Almaden, Cupertino, CA 95014 USA
[2] Samsung, Hwaseong Si 18448, South Korea
[3] Stanford Univ, Stanford, CA 94305 USA
[4] NVIDIA Corp, Santa Clara, CA 95051 USA
[5] MICAS KU Leuven, B-3001 Heverlee, Belgium
[6] IMEC, B-3001 Heverlee, Belgium
来源：
IEEE DESIGN & TEST | 2022年 / 39卷 / 03期
关键词：
YY Benchmark testing; Computer architecture; Measurement; Integrated circuit modeling; Best practices; Computational modeling; AI processing; ML accelerator; chip evaluation; benchmarking; deep learning; architecture; circuit; ACCELERATOR;
D O I：
10.1109/MDAT.2021.3063366
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This article provides an overview of benchmarking strategies at a different set of abstraction levels and related best practices in each, while working to also give an overall view of impact. © 2013 IEEE.
引用
收藏
页码：18 / 27
页数：10
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