Design of an IPv4/IPv6 translator based on SOPC technology

被引：0
|
作者：
Liu, Wai-xi [1 ]
Tang, Run-hua [2 ]
Li, Hui [3 ]
Hu, Xiao [1 ]
机构：
[1] Guangzhou Univ, Coll Mech & Elect Engn, Guangzhou, Peoples R China
[2] Guangdong Food & Drug Vocat Coll, Informat & Network Ctr, Guangzhou, Guangdong, Peoples R China
[3] Peking Univ, Shenzhen Grad Sch, Key Lab Integrated Microsyst, Shenzhen, Peoples R China
来源：
PROCEEDINGS OF 2008 IEEE INTERNATIONAL CONFERENCE ON NETWORKING, SENSING AND CONTROL, VOLS 1 AND 2 | 2008年
基金：
中国国家自然科学基金;
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
As the key device of IPv4-IPv6 interconnection, an IPv4/IPv6 translator has to support high forward speed However, there is no existing solution published to satisfy the requirement. In this paper, a solution of IPv4/IPv6 translator based on SOPC (System on Programmable Chip) technology is proposed It is based on top-down design methodology. In the development process, VHDL programming and schematic design are both used and the system is implemented on one FPGA chip. Test results show that its maximum forward speed is 800Mbps and its delay time is 40ns from v4 to v6 network, and 96ns from IPv6 to IPv4.
引用
收藏
页码：786 / +
页数：2
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