New Hardware Architecture for Self-Organizing Map Used for Color Vector Quantization

被引:3
|
作者
Ben Khalifa, Khaled [1 ,2 ]
Blaiech, Ahmed Ghazi [1 ,2 ]
Abadi, Mehdi [1 ]
Bedoui, Mohamed Hedi [2 ]
机构
[1] Univ Sousse, Inst Super Sci Appliquees & Technol Sousse, Sousse 4003, Tunisia
[2] Univ Monastir, Fac Med Monastir, Lab Rech Technol & Imagerie Med, LR12ES06, Monastir 5019, Tunisia
关键词
Self-Organizing Map (SOM); Diagonal-SOM (D-SOM); Hardware implementation; FPGAs; Neuroprocessors; vector quantization; IMPLEMENTATION; RECOGNITION; SOM; PARALLEL; SYSTEM;
D O I
10.1142/S0218126620500024
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we present a new generic architectural approach of a Self-Organizing Map (SOM). The proposed architecture, called the Diagonal-SOM (D-SOM), is described as an Hardware- Description-Language as an intellectual property kernel with easily adjustable parameters.The D-SOM architecture is based on a generic formalism that exploits two levels of the nested parallelism of neurons and connections. This solution is therefore considered as a system based on the cooperation of a distributed set of independent computations. The organization and structure of these calculations process an oriented data flow in order to find a better treatment distribution between different neuroprocessors. To validate the D-SOM architecture, we evaluate the performance of several SOM network architectures after their integration on a Xilinx Virtex-7 Field Programmable Gate Array support. The proposed solution allows the easy adaptation of learning to a large number of SOM topologies without any considerable design effort. 16 x 16 SOM hardware is validated through FPGA implementation, where temporal performance is almost twice as fast as that obtained in the recent literature. The suggested D-SOM architecture is also validated through simulation on variable-sized SOM networks applied to color vector quantization.
引用
收藏
页数:35
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