On quantum effects and low frequency noise spectroscopy in Si Gate-All-Around Nanowire MOSFETs at cryogenic temperatures

被引:0
|
作者
Boudier, D. [1 ]
Cretu, B. [1 ]
Simoen, E. [2 ]
Veloso, A. [2 ]
Collaert, N. [2 ]
机构
[1] Normandie Univ, UNICAEN, ENSICAEN, CNRS,GREYC, F-14000 Caen, France
[2] IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
关键词
Gate-All-Around; SOI MOSFET; nanowire; cryogenic temperature; low frequency noise; noise spectroscopy; FINFETS;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this work, DC and low frequency noise have been investigated in Gate-All-Around Nanowire MOSFETs at very low temperatures. Static characteristics at 4.2 K exhibit step-like effects that can be associated to energy subbands scattering. The mobility and subthreshold swing are also investigated. Finally the low frequency noise spectroscopy (from 10 K to 70 K) leads to the identification of silicon film traps.
引用
收藏
页码:5 / 8
页数:4
相关论文
共 50 条
  • [1] Detailed characterisation of Si Gate-All-Around Nanowire MOSFETs at cryogenic temperatures
    Boudier, D.
    Cretu, B.
    Simoen, E.
    Veloso, A.
    Collaert, N.
    [J]. SOLID-STATE ELECTRONICS, 2018, 143 : 27 - 32
  • [2] On trap identification in triple-gate FinFETs and Gate-All-Around Nanowire MOSFETs using low frequency noise spectroscopy
    Boudier, D.
    Cretu, B.
    Simoen, E.
    Veloso, A.
    Collaert, N.
    [J]. 2017 INTERNATIONAL CONFERENCE ON NOISE AND FLUCTUATIONS (ICNF), 2017,
  • [3] Discussion on the 1/f noise behavior in Si gate-all-around nanowire MOSFETs at liquid helium temperatures
    Boudier, D.
    Cretu, B.
    Simoen, E.
    Veloso, A.
    Collaert, N.
    [J]. 2018 JOINT INTERNATIONAL EUROSOI WORKSHOP AND INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (EUROSOI-ULIS), 2018, : 81 - 84
  • [4] STATIC CHARACTERISTICS OF GATE-ALL-AROUND SOI MOSFETS AT CRYOGENIC TEMPERATURES
    SIMOEN, E
    CLAEYS, C
    [J]. PHYSICA STATUS SOLIDI A-APPLICATIONS AND MATERIALS SCIENCE, 1995, 148 (02): : 635 - 642
  • [5] From gate-all-around to nanowire MOSFETs
    Colinge, Jean-Pierre
    [J]. CAS 2007 INTERNATIONAL SEMICONDUCTOR CONFERENCE, VOLS 1 AND 2, PROCEEDINGS, 2007, : 11 - 17
  • [6] Structure effects in the gate-all-around silicon nanowire MOSFETs
    Liang, Gengchiau
    [J]. EDSSC: 2007 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, VOLS 1 AND 2, PROCEEDINGS, 2007, : 129 - 132
  • [7] High Frequency and Noise Model of Gate-All-Around MOSFETs
    Nae, B.
    Lazaro, A.
    Iniguez, B.
    [J]. PROCEEDINGS OF THE 2009 SPANISH CONFERENCE ON ELECTRON DEVICES, 2009, : 112 - 115
  • [8] High-Frequency Gate-All-Around Vertical InAs Nanowire MOSFETs on Si Substrates
    Johansson, Sofia
    Memisevic, Elvedin
    Wernersson, Lars-Erik
    Lind, Erik
    [J]. IEEE ELECTRON DEVICE LETTERS, 2014, 35 (05) : 518 - 520
  • [9] Low-Frequency Noise in Vertical InAs/InGaAs Gate-All-Around MOSFETs at 15 K for Cryogenic Applications
    Ram, Mamidala Saketh
    Svensson, Johannes
    Skog, Sebastian
    Johannesson, Sofie
    Wernersson, Lars-Erik
    [J]. IEEE ELECTRON DEVICE LETTERS, 2022, 43 (12) : 2033 - 2036
  • [10] Potential and Quantum Threshold Voltage Modeling of Gate-All-Around Nanowire MOSFETs
    Pandian, M.
    Balamurugan, N.
    Pricilla, A.
    [J]. ACTIVE AND PASSIVE ELECTRONIC COMPONENTS, 2013, 2013 (2013)