Development toward Wafer-Scale Graphene RF Electronics

被引:0
|
作者
Moon, J. S. [1 ]
Curtis, D. [1 ]
Hu, M. [1 ]
Wong, D. [1 ]
Campbell, P. M. [2 ]
Jernigan, G. [2 ]
Tedesco, J. [2 ]
VanMil, B. [2 ]
Myers-Ward, R. [2 ]
Eddy, C., Jr. [2 ]
Gaskill, D. K. [2 ]
Robinson, J. [3 ]
Fanton, M. [3 ]
Asbeck, P. [4 ]
机构
[1] HRL Labs LLC, 3011 Malibu Canyon Rd, Malibu, CA 90265 USA
[2] Naval Res Lab, Washington, DC 20375 USA
[3] Penn State Univ, EOC, University Pk, PA 16802 USA
[4] Univ Calif San Diego, La Jolla, CA 92093 USA
关键词
Graphene; MOSFET; High-K dielectric;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We will present recent development of graphene FET technology on a wafer scale, including epitaxial graphene growth, device fabrication and characterization. The epitaxial growth of graphene on 2-inch wafers were fabricated via graphitization of Si-face SiC(0001) substrates. The sheet electron carrier density of these layers were typically 10(-13)/cm(2) at room temperature and had mobility of similar to 1500 cm(2) V-1S-1 or higher. Graphene FETs were fabricated with source and drain non-alloyed ohmic metal schemes. Metal gates were used on top of atomic-layer-deposited high-k (Al2O3) gate dielectric layer. DC and RF performance of the world's first epitaxial graphene RF FETs is presented.
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页数:2
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