A new approach to design reliable real-time speech recognition systems

被引:0
|
作者
Vargas, F [1 ]
Fagundes, RD [1 ]
Barros, D [1 ]
机构
[1] Catholic Univ, PUCRS, Dept Elect Engn, BR-90619900 Porto Alegre, RS, Brazil
关键词
HW-SW codesign; digital signal processing - DSP; speech-recognition systems; fault-tolerance techniques; transparent BIST; area overhead; performance degradation;
D O I
10.1109/OLT.2001.937840
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Hereafter, we propose a novel approach that couples HW/SW codesign with redundancy techniques to implement speech recognition systems (SRS). Due to the specific characteristics of digital signal processing (DSP) algorithms, these systems deserve special attention when partitioning the HW and SW parts. Also, in many, applications like voice-oriented bank transactions or security systems, the need for reliability, is also mandatory. Therefore, the methodology we present herein partitions the HW and SW parts in such a way to boost system performance while area overhead is maintained as low as possible. At the same time, reliability in terms of redundancy (Consistency Check and Transparent BIST) is included into the SRS. In the next sections of the paper, we will refer to the proposed approach cis "speech recognition-oriented HW/SW partitioning and fault-tolerant design" approach (or simply SCORPION approach)(1).
引用
收藏
页码:187 / 191
页数:5
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