Demonstration of enhancement-mode GaAs metal-insulator-semiconductor field effect transistor with channel inversion using Si3N4 as gate dielectric

被引:3
|
作者
Zheng, J. F. [2 ]
Tsai, W. [2 ]
Li, W. P. [1 ]
Wang, X. W. [1 ]
Ma, T. P. [1 ]
机构
[1] Yale Univ, Dept Elect Engn, New Haven, CT 06520 USA
[2] Intel Corp, Santa Clara, CA 95052 USA
关键词
D O I
10.1063/1.2943148
中图分类号
O59 [应用物理学];
学科分类号
摘要
We report n-channel enhancement-mode GaAs metal-insulator-semiconductor Field Effect Transistors (MISFETs) with similar to 6 nm equivalent oxide thickness of molecular-and-atomic (MAD) depositioned Si3N4 as the gate dielectric. The GaAs based MISFETs were fabricated using a gate-first process that preserved the channel inversion characteristic in MIS capacitor structures [W. P. Li, X. W. Wang, Y. X. Liu, and T. P. Ma, Appl. Phys. Lett. 90, 193503 (2007)]. The channel inversion characteristics of the GaAs MIS capacitors, measured by the quasistatic C-V (capacitor-voltage) technique, were well maintained throughout the entire fabrication process with temperatures up to 800 degrees C. C-V hysteresis as small as 100 mV was achieved. The Si3N4-gated GaAs MISFETs clearly demonstrated the enhancement-mode, gate-modulated I-d-V-d transfer characteristics with channel inversion. (C) 2008 American Institute of Physics.
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页数:3
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