共 50 条
- [1] A Power Modelling Approach for Many-core Architectures [J]. 2014 10TH INTERNATIONAL CONFERENCE ON SEMANTICS, KNOWLEDGE AND GRIDS (SKG), 2014, : 128 - 132
- [3] Adaptive Power Profiling for Many-Core HPC Architectures [J]. 2016 IEEE INTERNATIONAL CONFERENCE ON AUTONOMIC COMPUTING (ICAC), 2016, : 179 - 188
- [4] Distributed Peak Power Management for Many-core Architectures [J]. DATE: 2009 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, VOLS 1-3, 2009, : 1556 - 1559
- [5] Accelerated Online Error Detection in Many-core Microprocessor Architectures [J]. 2014 IEEE 32ND VLSI TEST SYMPOSIUM (VTS), 2014,
- [6] Adaptive Fault Simulation on Many-core Microprocessor Systems [J]. PROCEEDINGS OF THE 2015 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI AND NANOTECHNOLOGY SYSTEMS (DFTS), 2015, : 151 - 154
- [7] Software-Based Hardware Fault Tolerance for Many-Core Architectures [J]. IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE VLSI SYSTEMS, PROCEEDINGS, 2009, : 223 - 223
- [8] Algorithm-based Fault-Tolerance on Many-Core Architectures [J]. IT-INFORMATION TECHNOLOGY, 2010, 52 (04): : 209 - 215
- [9] Resource Management of Many-core Architectures in Different Abstraction Levels [J]. 2015 16TH INTERNATIONAL CARPATHIAN CONTROL CONFERENCE (ICCC), 2015, : 389 - 392
- [10] Automatic management of Software Programmable Memories in Many-core Architectures [J]. IET COMPUTERS AND DIGITAL TECHNIQUES, 2016, 10 (06): : 288 - 298