Test sequence compaction for sequential circuits with reset states

被引：1
|
作者：
Higami, Y [1 ]
Takamatsu, Y [1 ]
Kinoshita, K [1 ]
机构：
[1] Ehime Univ, Matsuyama, Ehime 790, Japan
来源：
PROCEEDINGS OF THE NINTH ASIAN TEST SYMPOSIUM (ATS 2000) | 2000年
关键词：
D O I：
10.1109/ATS.2000.893620
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, we propose a static test compaction method for sequential circuits with reset states under single stuck-at fault assumption. The proposed method first finds unremovable vectors by fault-dropping fault simulation or by non-fault-dropping fault simulation. Next, a subset of test vectors other than unremovable vectors are replaced with a reset signal. Detection of faults detected by an original test sequence is guaranteed by logic simulation and fault simulation for test subsequences. Experimental results for benchmark circuits demonstrate the effectiveness of the proposed method.
引用
收藏
页码：165 / 170
页数：6
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