共 50 条
- [33] On SAT-Based Model Checking of Speed-Independent Circuits [J]. 2022 25TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS (DDECS), 2022, : 100 - 105
- [34] Evaluation of SAT-based bounded model checking of ACTL properties [J]. TASE 2007: FIRST JOINT IEEE/IFIP SYMPOSIUM ON THEORETICAL ASPECTS OF SOFTWARE ENGINEERING, PROCEEDINGS, 2007, : 339 - +
- [35] An analysis of SAT-based model checking techniques in an industrial environment [J]. CORRECT HARDWARE DESIGN AND VERIFICATION METHODS, PROCEEDINGS, 2005, 3725 : 254 - 268
- [36] Formalizing the Soundness of the Encoding Methods of SAT-based Model Checking [J]. 2020 INTERNATIONAL SYMPOSIUM ON THEORETICAL ASPECTS OF SOFTWARE ENGINEERING (TASE 2020), 2020, : 105 - 112
- [37] Learning from BDDs in SAT-based bounded model checking [J]. 40TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2003, 2003, : 824 - 829
- [38] State set management for SAT-based unbounded model checking [J]. 2005 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS & PROCESSORS, PROCEEDINGS, 2005, : 585 - 590
- [39] SAT-based counterexample guided abstraction refinement in model checking [J]. AUTOMATED DEDUCTION - CADE-19, PROCEEDINGS, 2003, 2741 : 1 - 1
- [40] Integrating BDD-based and SAT-based symbolic model checking [J]. FRONTIERS OF COMBINING SYSTEMS, 2002, 2309 : 49 - 56