Si Nanodot Device Fabricated by Thermal Oxidation and Their Applications

被引:0
|
作者
Takahashi, Yasuo [1 ]
Jo, Mingyu [1 ]
Kaizawa, Takuya [1 ]
Kato, Yuki [1 ]
Arita, Masashi [1 ]
Fujiwara, Akira [2 ]
Ono, Yukinori [1 ]
Inokawa, Hiroshi [3 ]
Choi, Jung-Bum [4 ]
机构
[1] Hokkaido Univ, Grad Sch Informat Sci & Technol, Sapporo, Hokkaido 0600814, Japan
[2] NTT Corp, NTT Basic Res Labs, Atsugi, Kanagawa 2430198, Japan
[3] Univ Shizuoka, Res Inst Elect, Hamamatsu, Shizuoka 4328011, Japan
[4] Chungbuk Natl Univ, Phys & Res Inst Nanosci & Technol, Cheongju, Chungbuk 361763, South Korea
关键词
Nanodot; Double dot; Coupled dot; Single-electron; Coulomb blockade; SOI; Adder; Half adder; Full adder; Selectable logic device; SINGLE-ELECTRON-TRANSISTOR; OXIDE-SEMICONDUCTOR TRANSISTORS; ROOM-TEMPERATURE; LOGIC; BINARY; GATE;
D O I
10.4028/www.scientific.net/KEM.470.175
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Small single-electron devices (SEDs) consisting of many Si nanodots are fabricated on a silicon-on-insulator (SOT) wafer by means of pattern-dependent oxidation (PADOX) method. We investigated SEDs from two kinds of viewpoint. One is how to fabricate the nanodots, especially coupled nanodots, which are important to achieve quantum computers and single-electron transfer devices. The other is demonstration of new applications that tolerate the size fluctuation. In order to achieve multi-coupled nanodots, we developed an easy method by applying PADOX to a specially designed Si nanowire which has small constrictions at the ends of the wire. We confirmed the double-dot formation and position of the Si nanodots in the wire by analyzing the measured electrical characteristics. To achieve high functionality together with low-power consumption and tolerance to size fluctuation, we developed nanodot array device which has many input gates and outputs terminals. The fabricated three-input and two-output nanodot device actually provide high functionality such as a half adder and a full adder.
引用
收藏
页码:175 / +
页数:3
相关论文
共 50 条
  • [1] Effect of nanodot areal density and period on thermal conductivity in SiGe/Si nanodot superlattices
    Lee, Minjoo Larry
    Venkatasubramanian, Rama
    APPLIED PHYSICS LETTERS, 2008, 92 (05)
  • [2] Full adder operation based on Si nanodot array device
    Kaizawa, Takuya
    Arita, Masashi
    Fujiwara, Akira
    Yamazaki, Kenji
    Ono, Yukinori
    Inokawa, Hiroshi
    Takahashi, Yasuo
    2008 IEEE SILICON NANOELECTRONICS WORKSHOP, 2008, : 30 - 31
  • [3] Charge-trap memory device fabricated by oxidation of Si1-xGex
    King, YC
    King, TJ
    Hu, CM
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2001, 48 (04) : 696 - 700
  • [4] Frictional behavior of Ag nanodot-pattern fabricated by thermal dewetting
    Kim, Hyun-Joon
    Kim, Dae-Eun
    SURFACE & COATINGS TECHNOLOGY, 2013, 215 : 234 - 240
  • [5] Control on the formation of Si nanodots fabricated by thermal annealing/oxidation of hydrogenated amorphous silicon
    Hazra, S. (shazra@udel.edu), 1600, American Institute of Physics Inc. (96):
  • [6] Control on the formation of Si nanodots fabricated by thermal annealing/oxidation of hydrogenated amorphous silicon
    Hazra, S
    Sakata, I
    Yamanaka, M
    Suzuki, E
    JOURNAL OF APPLIED PHYSICS, 2004, 96 (12) : 7532 - 7536
  • [7] Anomalous light-induced enhancement of photoluminescence from Si nanocrystals fabricated by thermal oxidation of amorphous Si
    Kim, Min Choul
    Kim, Sung
    Choi, Suk-Ho
    Park, Sangjin
    APPLIED PHYSICS LETTERS, 2007, 91 (03)
  • [8] Wet thermal oxidation for GaAs, GaN and Metal/GaN device applications
    Korbutowicz, Ryszard
    Prazmowska, Joanna
    Wagrowski, Zbigniew
    Szyszka, Adam
    Tlaczala, Marek
    ASDAM 2008, CONFERENCE PROCEEDINGS, 2008, : 163 - 166
  • [9] Single-Electron Device With Si Nanodot Array and Multiple Input Gates
    Kaizawa, Takuya
    Arita, Masashi
    Fujiwara, Akira
    Yamazaki, Kenji
    Ono, Yukinori
    Inokawa, Hiroshi
    Takahashi, Yasuo
    Choi, Jung-Bum
    IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2009, 8 (04) : 535 - 541
  • [10] SUPERLATTICE STRUCTURE AMORPHOUS SI FILMS FABRICATED BY THE PHOTO-CVD METHOD AND THEIR DEVICE APPLICATIONS
    NAKANO, S
    TARUI, H
    MATSUYAMA, T
    NAKAMURA, N
    TSUDA, S
    WATANABE, K
    HAKU, H
    NISHIKUNI, M
    HISHIKAWA, Y
    OHNISHI, M
    KUWANO, Y
    JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1987, 134 (8B) : C445 - C445