A Transient-Enhanced Output-Capacitor-Free Low-Dropout Regulator With Dynamic Miller Compensation

A transient-enhanced output-capacitor-free low-dropout regulator (LDR) based on dynamic Miller compensation (DMC) is presented in this brief. By utilizing different Miller capacitors to compensate the LDR at different load ranges, the proposed DMC technique can extend the loop bandwidth and enhance the transient performances. The DMC scheme is simple and effective. A proof-of-concept LDR with DMC is designed in a 0.18-mu m CMOS process. It has a 100-mA maximum load capability with a quiescent current of 8.5 mu A. Measurement results show that the output undershoot/overshoot and recovery time of the proposed LDR with DMC are only 38 mV/0.4 mu s and 37 mV/1.22 mu s when the load current changes between 100 mu A and 100 mA, respectively, whereas they are 45 mV/1.3 mu s and 200 mV/4.97 mu s without DMC. Line transient responses are also significantly improved by the DMC technique.