Random Dopant Fluctuation in Gate-All-Around Nanowire FET

被引:0
|
作者
Tan, Cher Ming [1 ]
Chen, Xiangchen [2 ]
机构
[1] Chang Gung Univ, Taoyuan, Taiwan
[2] Nanyang Technol Univ, Sch EEE, Singapore, Singapore
关键词
junctionless; inversion mode; threshold voltage; device applications;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The random dopant fluctuation (RDF) induced threshold voltage variation are compared between a junction less and an inversion mode gate-all-around (GAA) silicon nanowire FET. We found that the RDF induced variation of junction less GAA nanowire FET is larger and more sensitive than that of the inversion mode GAA nanowire FET, and it is contributed by the higher doping concentration in the nanowire of the junctionless device. The impact of RDF on the I-d-V-g of the FETs found in this work also suggest appropriate operating conditions for the FETs in order to reduce the impact ofRDF.
引用
收藏
页数:4
相关论文
共 50 条
  • [1] Variability of Threshold Voltage Induced by Work-Function Fluctuation and Random Dopant Fluctuation on Gate-All-Around Nanowire nMOSFETs
    Sung, Wen-Li
    Chuang, Min-Hui
    Li, Yiming
    [J]. 2019 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD 2019), 2019, : 174 - 177
  • [2] Modeling and analysis of gate-all-around silicon nanowire FET
    Chen, Xiangchen
    Tan, Cher Ming
    [J]. MICROELECTRONICS RELIABILITY, 2014, 54 (6-7) : 1103 - 1108
  • [3] A dopingless gate-all-around (GAA) gate-stacked nanowire FET with reduced parametric fluctuation effects
    Sarabdeep Singh
    Ashish Raman
    [J]. Journal of Computational Electronics, 2018, 17 : 967 - 976
  • [4] A dopingless gate-all-around (GAA) gate-stacked nanowire FET with reduced parametric fluctuation effects
    Singh, Sarabdeep
    Raman, Ashish
    [J]. JOURNAL OF COMPUTATIONAL ELECTRONICS, 2018, 17 (03) : 967 - 976
  • [5] Metal Grain Granularity Study on a Gate-All-Around Nanowire FET
    Nagy, Daniel
    Indalecio, Guillermo
    Garcia-Loureiro, Antonio J.
    Elmessary, Muhammad A.
    Kalna, Karol
    Seoane, Natalia
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2017, 64 (12) : 5263 - 5269
  • [6] Impact of Gate Edge Roughness Variability on FinFET and Gate-All-Around Nanowire FET
    Espineira, G.
    Nagy, D.
    Indalecio, G.
    Garcia-Loureiro, A. J.
    Kalna, K.
    Seoane, N.
    [J]. IEEE ELECTRON DEVICE LETTERS, 2019, 40 (04) : 510 - 513
  • [7] Junctionless Gate-all-around Nanowire FET with Asymmetric Spacer for Continued Scaling
    V. Bharath Sreenivasulu
    Vadthiya Narendar
    [J]. Silicon, 2022, 14 : 7461 - 7471
  • [8] FinFET Versus Gate-All-Around Nanowire FET: Performance, Scaling, and Variability
    Nagy, Daniel
    Indalecio, Guillermo
    Garcia-Loureiro, Antonio J.
    Elmessary, Muhammad A.
    Kalna, Karol
    Seoane, Natalia
    [J]. IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2018, 6 (01): : 332 - 340
  • [9] Junctionless Gate-all-around Nanowire FET with Asymmetric Spacer for Continued Scaling
    Sreenivasulu, V. Bharath
    Narendar, Vadthiya
    [J]. SILICON, 2022, 14 (13) : 7461 - 7471
  • [10] Statistical variability study of random dopant fluctuation on gate-all-around inversion-mode silicon nanowire field-effect transistors
    Yoon, Jun-Sik
    Rim, Taiuk
    Kim, Jungsik
    Kim, Kihyun
    Baek, Chang-Ki
    Jeong, Yoon-Ha
    [J]. APPLIED PHYSICS LETTERS, 2015, 106 (10)