Analysis and Characterization of Ultra Low Power Branch Predictors

被引:5
|
作者
Chatzidimitriou, Athanasios [1 ]
Papadimitriou, George [1 ]
Gizopoulos, Dimitris [1 ]
Ganapathy, Shrikanth [2 ,3 ]
Kalamatianos, John [2 ,3 ]
机构
[1] Univ Athens, Dept Informat & Telecommun, Athens, Greece
[2] Adv Micro Devices Inc, AMD Res, Santa Clara, CA USA
[3] Adv Micro Devices Inc, AMD Res, Boxboro, MA USA
基金
欧盟地平线“2020”;
关键词
Branch predictors; energy efficiency; gem5; microarchitectural simulation; power; voltage scaling;
D O I
10.1109/ICCD.2018.00030
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Branch predictors are widely used to boost the performance of microprocessors. However, this comes at the expense of power because accurate branch prediction requires simultaneous access to several large tables on every fetch. Consumed power can be drastically reduced by operating the predictor under sub-nomimal voltage levels (undervolting) using a separate voltage domain. Faulty behavior resulting from undervolting the predictor arrays impacts performance due to additional mispredictions but does not compromise system reliability or functional correctness. In this work, we explore how two well established branch predictors (Tournament and L-Tage) behave when aggressively undervolted below minimum fault-free supply voltage (V-min). Our results based on fault injection and performance simulations show that both predictors significantly reduce their power consumption by more than 63% and can deliver a peak 6.4% energy savings in the overall system, without observable performance degradation However, energy consumption can increase for both predictors due to extra mispredictions, if undervolting becomes too aggressive.
引用
收藏
页码:144 / 147
页数:4
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