Design of A Neural Recording Amplifier with Tunable Pseudo Resistors

被引：0
|
作者：
Yao, Kai-Wen [1 ]
Gong, Cihun-Siyong Alex [2 ]
Yang, Shan-Ci [1 ]
Shiue, Muh-Tian [1 ]
机构：
[1] Natl Cent Univ, Dept Elect Engn, Chungli, Taiwan
[2] Ind Technol Res Inst, Chungli, Taiwan
来源：
2011 IEEE INTERNATIONAL SOC CONFERENCE (SOCC) | 2011年
关键词：
D O I：
暂无
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
This paper describes a voltage-controlled pseudo-resistor with widely available operating voltage range applied to neural recording amplifier designs. The proposed pseudo-resistor which consists of serial-connected PMOS device and an auto-tuning circuit provides ultra-high resistance to cancel DC offset from electrode-electrolyte interface. The proposed design has been estimated in standard CMOS 0.18-mu m process, achieving midband gain of 40 dB, bandwidth from 0.4 Hz to 7 kHz, input-referred noise of 5.98 mu Vrms, calculated NEF of 7.2, and 3.1-mu W power consumption.
引用
收藏
页码：376 / 379
页数：4
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