An ultra low-power capacitor-less LDO with high PSR

A compact high PSR Low Drop-Out (LDO) voltage regulator providing a peak load-current (I-L) of 100 mu A is realized in 0.13 mu m CMOS 1P6M process. Ultra low-power operation is achieved for the power block by realizing a nano-power bandgap reference circuit whose total power consumption including LDO is only just 95nW for 1.2Vsupply. The resistor-less reference circuit with no external capacitor for LDO stability results in a very compact design occupying just 0.033 mm(2). The proposed post-layout reference and LDO block consumes only 38nA and 41nA respectively, regulating output at 0.9V with a 1.2V supply.