Operation voltage dependence of memory cell characteristics in fully depleted floating-body cell

被引:16
|
作者
Shino, T [1 ]
Ohsawa, T [1 ]
Higashi, T [1 ]
Fujita, K [1 ]
Kusunoki, N [1 ]
Minami, Y [1 ]
Morikado, M [1 ]
Nakajima, H [1 ]
Inoh, K [1 ]
Hamamoto, T [1 ]
Nitayama, A [1 ]
机构
[1] Toshiba Co Ltd, SoC Res & Dev Ctr, Yokohama, Kanagawa 2358522, Japan
关键词
distribution; MOSFETs; random access memories; silicon-on-insulator (SOI) technology; threshold voltage;
D O I
10.1109/TED.2005.856808
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A one-transistor memory cell on silicon-on-insulator, called floating-body cell (FBC), has been developed and demonstrated. Threshold voltage difference between the "0"-state and the "1"-state, which is a key parameter for realizing a larger scale memory by FBCs, is measured and analyzed using a 96 kb array diagnostic monitor (ADM). A function test of the ADM yielded a fail-bit probability of 0.002%. A new metric relating to the fail-bit probability, that is, the ratio of the threshold voltage difference over the total threshold voltage variation, is introduced and applied to the measurement results. Read current distributions are also evaluated for various operation voltages. This paper also investigates substrate bias dependence of the threshold voltage unique to fully-depleted devices. Channel impurity and substrate impurity concentration dependence of the threshold voltage are analyzed based on experimental data and device simulation.
引用
收藏
页码:2220 / 2226
页数:7
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