A Threat of Malicious Hardware Using On-chip Voltmeter

被引:0
|
作者
Fujimoto, Daisuke [1 ]
Miyachi, Ryo [1 ]
Matsumoto, Tsutomu [1 ]
机构
[1] Yokohama Natl Univ, Yokohama, Kanagawa, Japan
来源
2017 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (APEMC) | 2017年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A lot of ICs are fabricated in external foundries. The design of ICs can be often outsourced. Such outsourcing has a potential risk to have produce malicious hardware. Malicious hardware means the hardware with built-in hidden malicious functions which aim at leaking information or weakening security level of the hardware such as degrading the quality of internal random number generation. In this paper, we point out the dangerousness of side-channel triggering on malicious hardware. The type of triggers cannot be detected in normal functional test processes. As an example we show the risk of malicious use of on-chip voltmeter. In addition we suggest security enhancement methods to avoid such malicious hardware.
引用
收藏
页码:96 / 98
页数:3
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