Efficient RC low-power bus encoding methods for crosstalk reduction

被引:10
|
作者
Fan, Chih-Peng [1 ]
Fang, Chia-Hao [1 ]
机构
[1] Natl Chung Hsing Univ, Dept Elect Engn, Taichung 402, Taiwan
关键词
Bus encoding; Crosstalk noise; Coupling activity; Low-power; SCHEME; OPTIMIZATION; ADDRESS;
D O I
10.1016/j.vlsi.2010.08.004
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In on-chip buses, the RC crosstalk effect leads to serious problems, such as wire propagation delay and dynamic power dissipation. This paper presents two efficient bus-coding methods. The proposed methods simultaneously reduce more dynamic power dissipation and wire propagation delay than existing bus encoding methods. Our methods also reduce more total power consumption than other encoding methods. Simulation results show that the proposed method I reduces coupling activity by 26.7-38.2% and switching activity by 3.7%-7% on 8-bit to 32-bit data buses, respectively. The proposed method II reduces coupling activity by 27.5-39.1% and switching activity by 5.3-9% on 8-bit to 32-bit data buses, respectively. Both the proposed methods reduce dynamic power by 23.9-35.3% on 8-bit to 32-bit data buses and total propagation delay by up to 30.7-44.6% on 32-bit data buses, and eliminate the Type-4 coupling. Our methods also reduce total power consumption by 23.6-33.9%, 23.9-34.3%, and 24.1-34.6% on 8-bit to 32-bit data buses with the 0.18, 0.13, and 0.09 mu m technologies, respectively. (C) 2010 Elsevier B.V. All rights reserved.
引用
收藏
页码:75 / 86
页数:12
相关论文
共 50 条
  • [1] Low-power bus encoding with crosstalk delay elimination
    Lyuh, CG
    Kim, T
    [J]. IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 2006, 153 (02): : 93 - 100
  • [2] Resource-constrained low-power bus encoding with crosstalk delay elimination
    Cha, M
    Lyuh, CG
    Kim, T
    [J]. ASP-DAC 2004: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, 2004, : 835 - 838
  • [3] Novel low-power bus invert coding methods with crosstalk detector
    Fang, Chia-Hao
    Fan, Chih-Peng
    [J]. JOURNAL OF THE CHINESE INSTITUTE OF ENGINEERS, 2011, 34 (01) : 123 - 139
  • [4] Low power bus encoding with crosstalk delay elimination
    Lyuh, CG
    Kim, T
    [J]. 15TH ANNUAL IEEE INTERNATIONAL ASIC/SOC CONFERENCE, PROCEEDINGS, 2002, : 389 - 393
  • [5] An efficient low-power bus architecture
    Rjoub, A
    Nikolaidis, S
    Koufopavlou, O
    Stouraitis, T
    [J]. ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV: CIRCUITS AND SYSTEMS IN THE INFORMATION AGE, 1997, : 1864 - 1867
  • [6] Low power system on chip bus encoding scheme with crosstalk noise reduction capability
    Khan, Z
    Arslan, T
    Erdogan, AT
    [J]. IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 2006, 153 (02): : 101 - 108
  • [7] Power-optimal encoding for low-power address bus
    Sun, Hai-Jun
    Shao, Zhi-Biao
    [J]. 2007, Harbin Institute of Technology, P.O. Box 136, Harbin, 150001, China (14)
  • [8] Power-optimal encoding for low-power address bus
    孙海珺
    邵志标
    [J]. Journal of Harbin Institute of Technology(New series), 2007, (05) : 652 - 656
  • [9] Narrow bus encoding for low-power DSP systems
    Shin, Y
    Choi, K
    Chang, YH
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2001, 9 (05) : 656 - 660
  • [10] Low-power instruction bus encoding for embedded processors
    Petrov, P
    Orailoglu, A
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2004, 12 (08) : 812 - 826