Low thermal budget processes for high-speed SiGe device processing

Modem consumer electronics require the development of novel Si-based high-speed devices with improved current gain, low noise and reduced power consumption operating in the GHz range. SiGe heterostructures with ultra-thin layers and abrupt heterojunctions promise a novel device generation with outstanding RF performance. One main concern for process development is the severe requirement for low thermal budget (LTB) techniques. Crystalline relaxation and outdiffusion yield a complete degradation of carrier mobility, current drive and all other related characteristic device data in an untolerable manner. In this contribution, an overview over different LTB processes (rapid thermal annealing, silicides and contact formation) is provided. Oxidation has turned out to be a key challenge for future deep sub-mu m Si and especially SiGe MOS device fabrication. In addition to a detailed characterization of different gate oxides fabricated at significantly reduced thermal budget (400-750 degrees C), the realization of test devices with gate lengths down to 0.7 mu m in a self-aligned process sequence with CoSi2 contacts is described. The devices have a large gate voltage swing (up to V-G=7 V), low leakage currents and a high current drive (I-DSS up to approximate to 430 mA/mm). Threshold voltages in a range of V-th= 0.1 to 0.5 V and high transconductances (g(me) up to 154 mS/mm) have been achieved.