65 nm CMOS receiver with 4.2 dB NF and 66 dB gain for 60 GHz applications

被引：3
|
作者：
Wang, N. Y. [1 ]
Wu, H. [1 ]
Liu, J. Y. C. [1 ]
Chang, M. -C. F. [1 ]
机构：
[1] Univ Calif Los Angeles, Dept Elect Engn, Los Angeles, CA 90095 USA
来源：
ELECTRONICS LETTERS | 2011年 / 47卷 / 01期
关键词：
D O I：
10.1049/el.2010.3094
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A direct conversion receiver for 60 GHz applications is fabricated in 65 nm CMOS. It consists of three low-noise amplifier gain stages, an RF mixer, a lowpass filter and a three-stage programmable gain amplifier. An overall minimum noise figure (NF) of 4.2 dB and maximum gain of 66 dB is achieved by the receiver occupying a core area of 0.26 mm(2) while drawing 36 mA of current from a 1 V supply.
引用
收藏
页码：15 / 16
页数：2
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