ADAPTIVE BLOCK LEVEL MANAGEMENT FOR HYBRID MAIN MEMORY

被引：0
|
作者：
Yang, Renhua [1 ]
Xue, Xiaoyong [1 ]
Xie, Yufeng [1 ]
Lin, Yinyin [1 ]
机构：
[1] Fudan Univ, ASIC & Syst State Key Lab, Shanghai 200433, Peoples R China
来源：
2014 12TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT) | 2014年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper proposes a PCM hybrid main memory management scheme called APABL (Adaptive PRAM aware Block-based LRU). Proposed scheme takes DRAM as the first memory and PCM as the spare memory. Only data evicted from DRAM is to be written into PCM. Our scheme can reduce both the access times to PCM and SSD without performance loss. Thus, it can also benefit the mobile computer.
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页数：3
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