The effect of subsurface doping on gate oxide charging damage

被引:0
|
作者
Linder, BP [1 ]
En, WG
Cheung, NW
机构
[1] Univ Calif Berkeley, Berkeley, CA 94720 USA
[2] Silicon Genesis Corp, Campbell, CA 94088 USA
关键词
dielectric breakdown; plasma charging damage; plasma immersion ion implantation; plasma materials-processing applications; semiconductor device ion implantation; semiconductor process modeling;
D O I
10.1109/27.747880
中图分类号
O35 [流体力学]; O53 [等离子体物理学];
学科分类号
070204 ; 080103 ; 080704 ;
摘要
The effect of webs and substrate type on gate oxide charging damage during plasma processing, and more specifically plasma immersion ion implantation, is modeled, The simulation combines the equations governing the plasma currents and integrated circuit device models to determine the gate oxide stressing voltage during implantation. Depending on the substrate type and the surface potential (V-s), a depletion region may exist, reducing the gate oxide voltage, and hence the gate oxide damage, In addition, well structures, by the nature of their capacitance, modulate V-s, altering the oxide stressing voltage. For most PIII implant conditions, gate oxides with p-type channel doping mill be damaged more than those oxides with n-type channel doping. Experimental results confirm the substrate and well effects on plasma charging damage.
引用
收藏
页码:1628 / 1634
页数:7
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