共 36 条
- [32] Roundoff Noise Reduction in 2-D State-Space Digital Filters Using High-Order Error Feedback and Realization 2013 9TH INTERNATIONAL CONFERENCE ON INFORMATION, COMMUNICATIONS AND SIGNAL PROCESSING (ICICS), 2013,
- [33] VLSI implementation of 2-D DWT/IDWT cores using 9/7-tap filter banks based on the non-expansive symmetric extension scheme ASP-DAC/VLSI DESIGN 2002: 7TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE AND 15TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2002, : 435 - 440
- [35] Reduction of artefacts caused by hip implants in CT-based attenuation-corrected PET images using 2-D interpolation of a virtual sinogram on an irregular grid European Journal of Nuclear Medicine and Molecular Imaging, 2011, 38 : 2257 - 2268