FPGA-based accelerator design for RankBoost in Web search engines

被引:0
|
作者
Xu, Ning-Yi [1 ]
Cai, Xiong-Fei [1 ]
Gao, Rui [1 ]
Zhang, Lei [1 ]
Hsu, Feng-Hsiung [1 ]
机构
[1] Microsoft Res Asia, Redmond, WA 98052 USA
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Search relevance is a key measurement for the usefulness of search engines. Shift of search relevance among search engines can easily change a search company's market cap by tens of billions of dollars. With the ever-increasing scale of the Web, machine learning technologies have become important tools to improve search relevance ranking. RankBoost is a promising algorithm in this area, but it is not widely used due to its long training time. To reduce the computation time for RankBoost, we designed a FPGA-based accelerator system. The accelerator, plugged into a commodity PC, increased the training speed on MSN search engine data by 2 orders of magnitude compared to the original software implementation on a server. The proposed accelerator has been successfully used by researchers in the search relevance ranking.
引用
收藏
页码:33 / 40
页数:8
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