Electrical design space exploration for high speed servers

被引：2

作者：

Wesley, Caleb ^{[1
]}

Mutnury, Bhyrav ^{[2
]}

Pham, Nam ^{[2
]}

Matoglu, Erdem ^{[2
]}

Cases, Moises ^{[2
]}

机构：

[1] North Carolina State Univ, ECE Dept, Raleigh, NC 27695 USA

[2] IBM Syst & Technol, Austin, TX 78758 USA

来源：

57TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2007 PROCEEDINGS | 2007年

关键词：

D O I：

10.1109/ECTC.2007.374032

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Today's high-speed systems are characterized by a multitude of electrical design parameters due to their complexity. Therefore, performing a thorough design space exploration is computationally exhaustive. This is primarily the result of the number of variables (electrical parameters) needed to do a comprehensive analysis. In this paper, a Genetic Algorithm (GA) based optimization method is described as a solution to address the above problem. Traditional statistical approaches like Design of Experiments (DoE) are explained along with their advantages and limitations that the GA based approach improves upon.

引用

页码：1748 / +

页数：2

共 50 条

[41] Design Space Exploration of DICE
Lorych, Dominik
Jaeger, Lukas
PROCEEDINGS OF THE 17TH INTERNATIONAL CONFERENCE ON AVAILABILITY, RELIABILITY AND SECURITY, ARES 2022, 2022,
[42] Erasure in design space exploration
Woodbury, R
Datta, S
Burrow, A
ARTIFICIAL INTELLIGENCE IN DESIGN '00, 2000, : 521 - 543
[43] Design space exploration revisited
Van Langen, PHG
Brazier, FMT
AI EDAM-ARTIFICIAL INTELLIGENCE FOR ENGINEERING DESIGN ANALYSIS AND MANUFACTURING, 2006, 20 (02): : 113 - 119
[44] Design Space Exploration for Security
Kang, Eunsuk
2016 IEEE CYBERSECURITY DEVELOPMENT (IEEE SECDEV 2016), 2016, : 30 - 36
[45] Practical Design Space Exploration
Nardi, Luigi
Koeplinger, David
Olukotun, Kunle
2019 IEEE 27TH INTERNATIONAL SYMPOSIUM ON MODELING, ANALYSIS, AND SIMULATION OF COMPUTER AND TELECOMMUNICATION SYSTEMS (MASCOTS 2019), 2019, : 347 - 358
[46] Accelerating design space exploration
Haubelt, C
Teich, J
2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2003, : 79 - 84
[47] Design Space Exploration of Single-Lane OFDM-Based Serial Links for High-Speed Wireline Communications
Kim, Gain
IEEE OPEN JOURNAL OF CIRCUITS AND SYSTEMS, 2022, 3 : 134 - 146
[48] High Level Quantitative Interconnect Estimation for Early Design Space Exploration
Meeuws, Roel
Sigdel, Kamana
Yankova, Yana
Bertels, Koen
PROCEEDINGS OF THE 2008 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY, 2008, : 317 - 320
[49] RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM
Mathew, Deepak M.
Chinazzo, Andre Lucas
Weis, Christian
Jung, Matthias
Giraud, Bastien
Vivet, Pascal
Levisse, Alexandre
Wehn, Norbert
EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION, SAMOS 2019, 2019, 11733 : 34 - 47
[50] Adaptive Simulated Annealer for High Level Synthesis Design Space Exploration
Schafer, Benjamin Carrion
Takenaka, Takashi
Wakabayashi, Kazutoshi
2009 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAM, 2009, : 106 - 109

← 1 2 3 4 5 →