共 50 条
- [1] A new fast DCT algorithm and its systolic VLSI implementation [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1997, 44 (11): : 959 - 962
- [2] Hardware Implementation of 4x4 DCT/Quantization Block Using Multiplication and Error-Free Algorithm [J]. TENCON 2009 - 2009 IEEE REGION 10 CONFERENCE, VOLS 1-4, 2009, : 967 - +
- [3] A fast algorithm of the DCT and IDCT for VLSI implementation [J]. ICSP '96 - 1996 3RD INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING, PROCEEDINGS, VOLS I AND II, 1996, : 637 - 640
- [5] ERROR-FREE PARALLEL RATIONAL ARITHMETIC FOR OPTICAL AND VLSI COMPUTING [J]. APPLIED OPTICS, 1987, 26 (22): : 4819 - 4822
- [9] RPCT ALGORITHM AND ITS VLSI IMPLEMENTATION [J]. IEEE TRANSACTIONS ON SYSTEMS MAN AND CYBERNETICS, 1994, 24 (01): : 87 - 99
- [10] A Parallel VLSI Algorithm for a High Throughput Systolic Array VLSI Implementation of Type IV DCT [J]. ISSCS 2009: INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS, VOLS 1 AND 2, PROCEEDINGS,, 2009, : 257 - 260