A Hardware/Software Codesign of a co-processor for real-time hyperelliptic curve cryptography on a spartan3 FPGA

被引：0

作者：

Klimm, Alexander ^{[1
]}

Sander, Oliver ^{[1
]}

Becker, Juergen ^{[1
]}

Subileau, Sylvain ^{[2
]}

机构：

[1] Univ Karlsruhe TH, Inst Tech Informationsverarbeitung, Engesserstr 5, D-76131 Karlsruhe, Germany

[2] Daimler AG, D-71034 Boblingen, Germany

来源：

ARCHITECTURE OF COMPUTING SYSTEMS - ARCS 2008, PROCEEDINGS | 2008年 / 4934卷

关键词：

Hyperelliptic Curve Cryptography (HECC); Public Key Cryptography (PKC); reconfigurable hardware; FPGA; embedded systems;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper describes the acceleration of calculations for public-key cryptography on hyperelliptic curves on very small FPGAs. This is achieved by using a Haxdware/Software Codesign Approach starting with an all-software implementation on an embedded Microprocessor and migrating very time-consuming calculations from software to hardware. Basic GF(2n)-hardware extensions are connected to work in conjunction with the Microprocessor and possible alternatives for connecting external hardware to the Microprocessor are investigated. The performance of the hardware implementations compared to their counterparts as a software approach are evaluated. Based on these results, a coprocessor is devised and optimized for performance. The system utilizes minimal resources and fits easily on a small FPCA. It allows for fast Hyperelliptic Curve Cryptography (HECC) operations while running at a very low clock speed of 33 MHz, thus making it suitable for usage in embedded systems.

引用

页码：188 / +

页数：3

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