Computer-Aided Design of Digital Compensators for DC/DC Power Converters

Digital control of high-frequency power converters has been used extensively in recent years, providing flexibility, enhancing integration, and allowing for smart control strategies. The core of standard digital control is the discrete linear compensator, which can be calculated in the frequency domain using well-known methods based on the frequency response requirements (crossover frequency, f(c), and phase margin, PM). However, for a given compensator topology, it is not possible to fulfill all combinations of crossover frequency and phase margin, due to the frequency response of the controlled plant and the limitations of the compensator. This paper studies the performance space (f(c), PM) that includes the set of achievable crossover frequencies and phase margin requirements for a combination of converter topology, compensator topology, and sensors, taking into account the effects of digital implementation, such as delays and limit cycling. Regarding limit cycling, two different conditions have been considered, which are related to the design of the digital compensator: a limited compensator integral gain, and a minimum gain margin. This approach can be easily implemented by a computer to speed up the calculations. The performance space provides significant insight into the control design, and can be used to compare compensator designs, select the simplest compensator topology to achieve a given requirement, determine the dynamic limitations of a given configuration, and analyze the effects of delays in the performance of the control loop. Moreover, a figure of merit is proposed to compare the dynamic performance of the different designs. The main goal is to provide a tool that identifies the most suitable compensator design in terms of the dynamic performance, the complexity of the implementation, and the computational resources. The proposed procedure to design the compensator has been validated in the laboratory using an actual DC/DC converter and a digital hardware controller. The tests also validate the theoretical performance space and the most suitable compensator design for a given dynamic specification.