Printed Circuit Board Insertion Loss Measurement Metrology Comparison

被引:0
|
作者
Hsu, Jimmy [1 ]
Su, Thonas [1 ]
Xiao, Kai [2 ]
Ye, Xiaoning [2 ]
Li, Y. L. [1 ]
机构
[1] Intel Microelect Asia LLC, Taiwan Branch, B1,205,Tun Hwa North Rd, Taipei, Taiwan
[2] Intel Corp, DCSG, Dupont, WA 98327 USA
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Channel loss is a dominant factor for the signaling performance of high-speed I/O's. Some platform design guides clearly specify the printed-circuit board (PCB) trace-only loss requirement. The via effect has a big impact on the loss of the entire channel and how to characterize the loss of a stripline design with the via effect being deembedded is very important for a designer to select the right material and manufacturing process control, balancing the platform cost and performance requirement. An improper selection of PCB material may result in either a costly over design or an increased risk of platform performance. This is especially true for traces on a thicker board with long via or any board with long via stub. Furthermore, the impact of via and via stub is more prominent when low-loss PCB material is used. A few methods for PCB trace loss characterization have been widely used in the industry, including Thru-Reflect-Line (TRL), Delta-L and Smart Fixture De-embedding (SFD), to remove the unwanted via effect in striplines. Some of methods, such as TRL, require a series of measurement procedures with many de-embedding structures. How to effectively remove via effect through a simple, efficient, and accurate approach in the high volume measurement is critical for platform designers, as well as PCB suppliers. In this paper, a study on PCB insertion loss measurement metrology is conducted to compare the accuracy and efficiency of different characterization methods.
引用
收藏
页码:177 / 179
页数:3
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