A 0.029mm2 17-fJ/Conv.-Step CT ΔΣ ADC With 2nd-Order Noise-Shaping SAR Quantizer

被引：0
|
作者：
Liu, Jiaxin [1 ,2 ]
Li, Shaolan [2 ]
Guo, Wenjuan [2 ]
Wen, Guangjun [1 ]
Sun, Nan [2 ]
机构：
[1] Univ Elect Sci & Technol China, Chengdu 611731, Peoples R China
[2] Univ Texas Austin, Austin, TX 78712 USA
来源：
2018 IEEE SYMPOSIUM ON VLSI CIRCUITS | 2018年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a compact and power-efficient 3rd -order CT Delta Sigma ADC with a single OTA. A 4-b fully-passive 2nd-order noise-shaping SAR ADC is employed as the quantizer that inherently provides two additional noise shaping orders. Fabricated in 40nm CMOS, the prototype ADC consumes 1.16mW with a 500MHz clock rate. It achieves a Walden FoM of 17-Wconv.-step and occupies an area of only 0.029 mm(2).
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页码：201 / 202
页数：2
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    [J]. IEICE TRANSACTIONS ON ELECTRONICS, 2016, E99C (08) : 963 - 973
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  • [8] SWITCHED-CAPACITOR 2ND-ORDER NOISE-SHAPING CODER
    LAINEY, G
    SAINTLAURENS, R
    SENN, P
    [J]. ELECTRONICS LETTERS, 1983, 19 (04) : 149 - 150
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