Pipelined High-throughput NTT Architecture for Lattice-Based Cryptography

Lattice-based cryptography is a powerful cryptographic primitive that can achieve post-quantum security. The most computational-intensive operations in the lattice-based cryptographic schemes are the polynomial multiplications over the ring, which can be accelerated by adopting the number theoretic transform (NTT) in practical applications. This paper proposes a novel hardware accelerator for the NTT algorithm for lattice-based cryptography applications, which can achieve full utilization for all the hardware components. The key ideas involve exploiting well-designed folding sets and applying the folding transformations to adapt the fast Fourier transform (FFT) multi-path delay commutator architectures and a lightweight modular multiplier.