Low Complexity Turbo Code Specification for Power-line Communication (PLC)

The development of turbo codes over the past two decades, has resulted in significant performance improvement of PLC communication systems, considerable reduction of the device size, development of more complex chips with channel coding support and implementation of more robust modulation techniques. Today, some of the major research problems are related to the implementation of efficient architectures for decoding algorithms, development of techniques for efficient power consumption management, and latency reduction in the hardware used. In this article we present a specification for a turbo code scheme applied to an OFDM transceiver on a PLC channel based on simulation results using a channel model impaired with AWGN and impulsive noise. The proposed specification includes practical considerations on the basis that a real turbo coding scheme (i.e. on a DSP) has less processing resources than those necessary to implement the original MAP-BCJR algorithm. The specification presented facilitates implementation in a device such as a DSP.