Performance Analysis of Embedded System for Data Acquisition on FPGA

被引：0

作者：

Rani, B. Jhansi ^{[1
]}

Sudhir, A. Ch. ^{[1
]}

Vidhyavathi, T. ^{[2
]}

机构：

[1] GITAM Deemed Be Univ, Visakhapatnam 530045, Andhra Pradesh, India

[2] GVP Coll Engn, Visakhapatnam 530045, Andhra Pradesh, India

来源：

SOFT COMPUTING IN DATA ANALYTICS, SCDA 2018 | 2019年 / 758卷

关键词：

Field-programmable gate array (FPGA); Resistor-transistor logic (RTL); UART; Hardware descriptive language ( HDL);

D O I：

10.1007/978-981-13-0514-6_41

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

Miniaturization is one of the major demands for the development of any modern embedded systems. This can be achieved by incorporating the entire design including processor on to a single FPGA. Field-programmable gate array is an IC (integrated circuit) which is programmable in the field after it gets manufactured either by the designer or by the customer and so it is called field programmable. The configuration of the FPGA is specified more generally by the HDL. The system developed on FPGA has the features as follows: standardization, modularization, and scalability. One of the applications is in an airborne SAR signal processing system. The main intention of this paper is to design and develop a data acquisition system using FPGA through designing and coding, verification, configuration of processor, and driver development.

引用

页码：409 / 416

页数：8

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