FPGA Implementation of a Support Vector Machine Classifier for Ultrasonic Flaw Detection

In this work, we investigate the hardware implementation of Support Vector Machine (SVM) prediction on an FPGA platform for industrial ultrasound applications. Specifically, SVM is used as classifier for identifying ultrasonic A-scan signals as signals with flaw or signals without flaw. Hardware acceleration using FPGA is the main theme of the presented work. The architecture used to implement the SVM prediction is discussed in detail. Synthesis results indicate that Ultrasonic flaw detection using SVM algorithm is feasible for real-time applications on programmable hardware such as FPGAs.